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A1230 Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Features and Benefits
Two matched Hall effect switches on a single substrate 1 mm Hall element spacing Superior temperature stability and industry-leading jitter performance through use of advanced chopperstabilization topology Integrated LDO regulator provides 3.3 V operation Integrated ESD protection from outputs and VCC to ground High sensitivity switchpoints Robust structure for EMC protection Solid-state reliability Reverse battery protection on supply and both output pins
Description
The A1230 is a dual-channel, bipolar switch with two Halleffect sensing elements, each providing a separate digital output for speed and direction signal processing capability. The Hall elements are photolithographically aligned to better than 1 m. Maintaining accurate mechanical location between the two active Hall elements eliminates the major manufacturing hurdle encountered in fine-pitch detection applications. The A1230 is a highly sensitive, temperature stable magnetic sensing device ideal for use in ring magnet based, speed and direction systems located in harsh automotive and industrial environments. The A1230 monolithic integrated circuit (IC) contains two independent Hall-effect bipolar switches located 1 mm apart. The digital outputs are out of phase so that the outputs are in quadrature when interfaced with the proper ring magnet design. This allows easy processing of speed and direction signals. Extremely low-drift amplifiers guarantee symmetry between the switches to maintain signal quadrature. The Allegro(R) patented, high-frequency chopper-stabilization technique cancels offsets in each channel providing stable operation over the full specified temperature and voltage ranges. Additionally, the high-frequency chopping circuits allow an increased analog signal-to-noise ratio at the input of the digital
Packages: 8-pin SOIC (suffix L), and 4-pin SIP (suffix K)
Not to scale
Continued on the next page...
Typical Application
VOUTPUTB VOUTPUTA 2
OUTPUTA
VSupply 100 A
1
A1230
VCC OUTPUTB
3
GND
0.1 F A Resistor is optional,
4
depending on Conducted Immunity requirements
Using regulated supply
A1230DS
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Description (continued) comparators internal to the IC. As a result, the A1230 achieves industry-leading digital output jitter performance that is critical in high performance motor commutation applications. An on-chip low dropout (LDO) regulator allows the use of this device over a wide operating voltage range. Post-assembly factory programming at Allegro provides sensitive switchpoints that are symmetrical
between the two switches. The A1230 is available in a plastic 8-pin SOIC surface mount package (L) and a plastic 4-pin SIP (K). Both are available in a temperature range of -40C to 150C. Each package is lead (Pb) free, with 100% matte tin plated leadframe.
Selection Guide
Part Number A1230LK-T A1230LLTR-T Packing* Bulk, 98 pieces/bag 13-in. reel, 3000 pieces/reel Mounting 4-pin SIP through hole 8-pin SOIC surface mount Ambient, TA -40C to 150C
*Contact Allegro for additional packing options.
Absolute Maximum Ratings
Characteristic Supply Voltage Reverse Battery Voltage Output Off Voltage Output Sink Current Magnetic Flux Density Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol VCC VRCC VOUTPUT IOUTPUT(Sink) B TA TJ(max) Tstg Range L Notes Rating 26.5 -16 VCC Internally Limited Unlimited -40 to 150 165 -65 to 170 Units V V V - - C C C
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Functional Block Diagram
VCC
Programmable Trim
LDO Regulator
4 Bit
Channel A 2 Bit Low Noise Signal Recovery Dynamic Offset Cancellation Hall Element E1 OUTPUTA Output Drive
Amp
LowPass Filter
Channel B 2 Bit Low Noise Signal Recovery Dynamic Offset Cancellation Hall Element E2 OUTPUTB Output Drive
Amp
LowPass Filter
GND
Pin-Out Diagrams Package K Package L
Terminal List Table
Pin Number Package K Package L 1 2 3 4 5-8 Name VCC Function Connects power supply to on-chip voltage regulator
1 2 3
1 2 3 4
8 7 6 5
1 2 3 4 -
OUTPUTA Output from E1 via first Schmitt circuit OUTPUTB Output from E2 via second Schmitt circuit GND NC Terminal for ground connection No connection
4
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
3
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
OPERATING CHARACTERISTICS Valid over operating temperature ranges unless otherwise noted; typical data applies to
VCC = 12 V, and TA = 25C Characteristic ELECTRICAL CHARACTERISTICS Supply Voltage2 Output Leakage Current Supply Current Low Output Voltage Output Sink Current Output Sink Current, Continuous3 Output Sink Current, Peak4 Chopping Frequency Output Rise Time Output Fall Time Power-On Time Power-Off Time Power-On State VCC IOUTPUT(OFF) ICC(OFF) ICC(ON) VOUTPUT(ON) IOUTPUT(SINK) IOUTPUT(SINK)C IOUTPUT(SINK)P fC tr tf tON tOFF POS CLOAD = 20 pF, RLOAD = 820 CLOAD = 20 pF, RLOAD = 820 B > 40 G or B < -40 G B > 40 G or B < -40 G B=0G TJ < TJ(max) ,VOUTPUT = 12 V t < 3 seconds Operating; TA 150C Either output B < BRP(A) ,B < BRP(B) B > BOP(A) ,B > BOP(B) Both outputs; IOUTPUT(SINK) = 20 mA; B > BOP(A), B > BOP(B) 3.3 - - - - - - - - - - - - - - <1 3.5 4.5 160 - - - 780 1.8 1.2 15 25 Low 18 10 6.0 6.0 500 20 70 220 - - - - - - V A mA mA mV mA mA mA kHz s s s s - Symbol Test Conditions Min. Typ. Max. Unit1
TRANSIENT PROTECTION CHARACTERISTICS Supply Zener Voltage Supply Zener Current5 Reverse-Battery Current VZ IZ IRCC ICC = 9 mA, TA = 25C VS = 28 V VRCC = -18 V, TJ < TJ(max) 28 - - - - 2 - 9.0 15 V mA mA
Continued on the next page...
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
4
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
OPERATING CHARACTERISTICS (continued) Valid over operating temperature ranges unless otherwise noted; typical
data applies to VCC = 12 V, and TA = 25C Characteristic MAGNETIC CHARACTERISTICS6 BOP(A), BOP(B) BRP(A), BRP(B) BHYS(A), BHYS(B) SYMA, SYMB SYMAB(OP) SYMAB(RP) - -30 5 -35 -25 -25 7 -7 14 - - - 30 - 35 35 25 25 G G G G G G Symbol Test Conditions Min. Typ. Max. Unit1
Operate Point: B > BOP Release Point: B < BRP Hysteresis: BOP(A) - BRP(A), BOP(B) - BRP(B) Symmetry: Channel A, Channel B, BOP(A) + BRP(A), BOP(B) + BRP(B) Operate Symmetry: BOP(A) - BOP(B) Release Symmetry: BRP(A) - BRP(B)
11 2When
G (gauss) = 0.1 mT (millitesla). operating at maximum voltage, never exceed maximum junction temperature, TJ(max). Refer to power derating curve charts. 3 Device will survive the current level specified, but operation within magnetic specification cannot be guaranteed. 4 Short circuit of the output to VCC is protected for the time duration specified. 5 Maximum specification limit is equivalent to I CC(max) + 3 mA. 6 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of B, and the sign indicates the polarity of the field (for example, a -100 G field and a 100 G field have equivalent strength, but opposite polarity).
EMC Contact Allegro MicroSystems for EMC performance.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
5
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Package Thermal Resistance Symbol RJA Test Conditions* Package K, 1-layer PCB with copper limited to solder pads Package L-8 pin, 1-layer PCB with copper limited to solder pads Package L-8 pin, 4-layer PCB based on JEDEC standard *Additional thermal data available on the Allegro Web site. Value Units 177 140 80 C/W C/W C/W
Power Derating Curve
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 20 40
Maximum Allowable VCC (V)
VCC(max) Package L, 4-layer PCB (RJA = 80 C/W) Package L, 1-layer PCB (RJA = 140 C/W) Package K, 1-layer PCB (RJA = 177 C/W) VCC(min)
60 80 100 120 140 160 180
Temperature (C)
Power Dissipation versus Temperature
1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20 40
Power Dissipation, PD (m W)
P (R ack ag J A= e 80 L, 4 C -la /W ye Pa c ) rP (R kage C JA B L, =1 1-l 40 aye C rP /W CB Pac ) (R kage K JA = , 177 1-laye r C/ W) PCB
60
80 100 120 140 Temperature, TA (C)
160
180
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
6
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Electrical Operating Characteristics
ICC(OFF) ICC(OFF)
8.0 7.0
8.0 7.0
Current (mA)
5.0 4.0 3.0 2.0 1.0 0.0 0 5 10 15 20
TA (C)
-40 25 150
Current (mA)
6.0
6.0 5.0 4.0 3.0 2.0 1.0 0.0 -50 0 50 100 150 200
VCC (V)
3.3 12 18
VCC (V)
Temperature ( C)
ICC(ON)
8.0 7.0 6.0 8.0 7.0 6.0
ICC(ON)
Current (mA)
5.0 4.0 3.0 2.0 1.0 0.0 0 5 10 15 20
Current (mA)
TA (C)
-40 25 150
5.0 4.0 3.0 2.0 1.0 0.0 -50 0 50 100 150 200
VCC (V)
3.3 12 18
VCC (V)
Temperature ( C)
VOUTPUT(on)
500 450 400
VCC (V) Ch. A
3.3 12 18
Voltage (mV)
350 300 250 200 150 100 50 0 -50 0 50 100 150 200
Ch. B
3.3 12 18
Temperature ( C)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
7
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics
Channel A, BOP and BRP Channel A, BOP and BRP TA (C)
30.0 20.0
30.0 20.0
BOP -40 25
VCC (V)
BOP 3.3 18 BRP 3.3 18
Switchpoint (G)
0.0 -10.0 -20.0 -30.0 0 5 10 15 20
150 BRP -40 25 150
Switchpoint (G)
10.0
10.0 0.0 -10.0 -20.0 -30.0 -50 0 50 100 150 200
VCC (V)
Temperature ( C)
Channel B, BOP and BRP
30.0 20.0 30.0
Channel B, BOP and BRP TA (C)
Switchpoint (G)
Switchpoint (G)
10.0 0.0 -10.0 -20.0 -30.0 0 5 10 15 20
BOP -40 25
20.0 10.0 0.0 -10.0 -20.0 -30.0 -50 0 50 100 150 200
VCC (V)
BOP 3.3 18 BRP 3.3 18
150 BRP -40 25 150
VCC (V)
Temperature ( C)
Channels A and B, BHYS(A) and BHYS(B)
35.0 30.0
Channels A and B, BHYS(A) and BHYS(B) TA (C) Ch. A
-40 25 150 35.0
BOP - BRP (G)
BOP - BRP (G)
30.0 25.0 20.0 15.0 10.0 5.0
VCC (V)
BOP 3.3 18 BRP 3.3 18
25.0 20.0 15.0 10.0 5.0 0 5 10 15 20
Ch. B
-40 25 150
-50
0
50
100
150
200
Temperature ( C)
VCC (V)
Additional magnetic characteristics on next page
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
8
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics
BOP Symmetry, SYMAB(OP) BOP Symmetry, SYMAB(OP)
25.0 20.0 15.0
25.0 20.0 15.0
Ch. A - Ch. B (G)
5.0 0.0 -5.0 -10.0 -15.0 -20.0 -25.0 0 5 10 15 20
TA (C)
-40 25 150
Ch. A - Ch. B (G)
10.0
10.0 5.0 0.0 -5.0 -10.0 -15.0 -20.0 -25.0 -50 0 50 100 150 200
VCC (V)
3.3 18
VCC (V)
Temperature ( C)
BRP Symmetry, SYMAB(RP)
25.0 20.0 15.0 10.0 5.0 0.0 -5.0 -10.0 -15.0 -20.0 -25.0 0 5 10 15 20 25.0 20.0 15.0
BRP Symmetry, SYMAB(RP)
Ch. A - Ch. B (G)
TA (C)
-40 25 150
Ch. A - Ch. B (G)
10.0 5.0 0.0 -5.0 -10.0 -15.0 -20.0 -25.0 -50 0 50 100 150 200
VCC (V)
3.3 18
VCC (V)
Temperature ( C)
Additional magnetic characteristics on next page
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
9
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics
Channel A Symmetry, SYMA 35.0 25.0 15.0 BOP + BRP (G) 5.0 -5.0 -15.0 -25.0 -35.0 0 5 10 VCC (V) 15 20 TA (C) BOP + BRP (G) -40 25 150 35.0 25.0 15.0 5.0 -5.0 -15.0 -25.0 -35.0 -50 0
Channel A Symmetry, SYMA
VCC (V) 3.3 18
50
100
150
200
Temperature (C)
Channel B Symmetry, SYMB 35.0 25.0 BOP + BRP (G) TA (C) -40 25 150 BOP + BRP (G) 15.0 5.0 -5.0 -15.0 -25.0 -35.0 0 5 10 VCC (V) 15 20 35.0 25.0 15.0 5.0 -5.0 -15.0 -25.0 -35.0 -50 0
Channel B Symmetry, SYMB
VCC (V) 3.3 18
50
100
150
200
Temperature (C)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
10
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Functional Description
Chopper-Stabilized Technique
A limiting factor for switchpoint accuracy when using Hall effect technology is the small signal voltage developed across the Hall plate. This voltage is proportionally small relative to the offset that can be produced at the output of the Hall IC. This makes it difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. Chopper-stabilization is a unique approach used to minimize Hall offset on the chip. The Allegro patented technique, dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package stress. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at baseband while the DC offset becomes a high frequency signal. Then, using a low-pass filter the signal passes while the modulated DC offset is suppressed. Allegro's new innovative chopper-stabilization technique uses a high frequency clock. This chopper-stabilization approach desensitizes the IC to temperature and stress. The high-frequency operation also allows a greater sampling rate that produces higher accuracy and faster signal processing capability. Additionally, filtering is more effective and results in a lower noise analog signal at the input to the Schmitt trigger. Therefore, this highfrequency chopping technique reduces jitter, also known as 360 repeatability, can be induced on the output signal. The sampleand-hold process, used by the demodulator to store and recover the signal, can slightly degrade the signal to noise ratio. This is because the process generates replicas of the noise spectrum at the baseband, causing a decrease in jitter performance. However, the improvement in switchpoint performance, resulting from the reduction of the effects of thermal and mechanical stress, outweighs the degradation in the signal to noise ratio. This technique produces devices that have an extremely stable quiescent Hall output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process which allows the use of low offset and low noise amplifiers in combination with high-density logic integration and sample and hold circuits.
Regulator
Sample and Hold
Amp
LowPass Filter
Chopper stabilization circuit (dynamic quadrature offset cancellation)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
11
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Typical Applications Operation
V+ Switch to High Switch to Low VOUTPUT(OFF)
VOUTPUT
VOUTPUT(ON)(sat) BRP B+ BOP BHYS Output voltage in relation to magnetic flux density received. Output on each channel independently follows the same pattern of transition through BOP followed by transition through BRP.
Channel A M agnetic Field at Hall Element E1
Channel B M agnetic Field at Hall Element E2
Channel A Output Signal at OUTPUTA Channel B Output Signal at OUTPUTB
Quadrature output signal configuration. The outputs of the two output channels have a phase difference of 90 when used with a properly designed magnet that has an optimal pole pitch of twice the Hall element spacing of 1.0 mm.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
12
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Typical Applications Circuits protection is generally required to protect the device against supply-side transients. Specifications for such transients vary for each application, so the design of the protection circuit should be optimized for each application. For example, the circuit shown in the unregulated supply diagram includes a Zener diode that offers high voltage load-dump protection and noise filtering by means of a series resistor and capacitor. In addition, it includes a series diode that protects against high-voltage reverse battery conditions.
VOUTPUTB VOUTPUTA 2
OUTPUTA
This device requires minimal protection circuitry during operation with a low-voltage regulated line. The on-chip voltage regulator provides immunity to power supply variations between 3.3 and 18 V. Because the device has open-drain outputs, pull-up resistors must be included. If protection against coupled and injected noise is required, then a simple low-pass filter on the supply (RC) and a filtering capacitor on each of the outputs may also be needed, as shown in the unregulated supply diagram. For applications in which the device receives its power from unregulated sources, such as a car battery, full
VSupply 100 A
1
A1230
VCC OUTPUTB
3
GND
0.1 F A Resistor is optional,
4
depending on Conducted Immunity requirements
Regulated supply
VOUTPUTB VOUTPUTA
2
OUTPUTA
VSupply 100
1
A1230
VCC OUTPUTB
3
GND
4 0.1 F
Unregulated supply
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
13
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Power Derating
The device must be operated below the maximum junction temperature of the device, TJ(max) . Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN x IIN T = PD x RJA TJ = TA + T (1) (2) (3)
Example: Reliability for VCC at TA = 150C, package L, using a single-layer PCB. Observe the worst-case ratings for the device, specifically: RJA = 140C/W, TJ(max) = 165C, VCC(max) = 18 V, and ICC(max) = 6 mA. Calculate the maximum allowable power level, PD(max) . First, invert equation 3: Tmax = TJ(max) - TA = 165 C - 150 C = 15 C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = Tmax / RJA = 15C / 140C/W = 107 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) / ICC(max) = 107 mW / 6 mA = 18 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages VCC(est) . Compare VCC(est) to VCC(max) . If VCC(est) VCC(max) , then reliable operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) VCC(max) , then operation between VCC(est) and VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25C, VCC = 12 V, ICC = 4 mA, and RJA = 140 C/W, then: PD = VCC x ICC = 12 V x 4 mA = 48 mW T = PD x RJA = 48 mW x 140 C/W = 7C TJ = TA + T = 25C + 7C = 32C A worst-case estimate, PD(max) , represents the maximum allowable power level, without exceeding TJ(max) , at a selected RJA and TA.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
14
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Package K, 4-pin SIP
+0.08 5.21 -0.05 45
B E E C
1.00
2.10 1.55 0.05 1.32 E Mold Ejector Pin Indent Branded Face 45 0.84 REF 1
D Standard Branding Reference View
+0.08 3.43 -0.05
NNNN YYWW
E1 2.16 MAX 0.51 REF 1 2 3 4
E2
A
N = Device part number Y = Last two digits of year of manufacture W = Week of manufacture
14.73 0.51
+0.06 0.38 -0.03
For Reference Only; not for tooling use (reference DWG-9010) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A
B C D E
Dambar removal protrusion (8X) Gate and tie bar burr area Active Area Depth, 0.43 mm REF Branding scale and appearance at supplier discretion
Hall elements (E1 and E2); not to scale
+0.07 0.41 -0.05
1.27 NOM
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
15
A1230
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Package L, 8-pin SOICN
4.90 0.10
D D
1.00 8
1.95
A
8 0 0.21 0.04
0.65 1.75
8
1.27
D
1.95 3.90 0.10 6.00 0.20 E1 B E2 +0.43 0.84 -0.44 1.04 REF 1 2 0.25 BSC SEATING PLANE GAUGE PLANE 1 B 2 PCB Layout Reference View 5.60
8X 0.10 C 0.41 0.10 1.27 BSC
SEATING PLANE +0.13 1.62 -0.27 +0.10 0.15 -0.05
C
For Reference Only; not for tooling use (reference DWG-9204) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Active Area Depth, 0.40 mm REF
C
NNNNNNN YYWW LLLL 1 Standard Branding Reference View
B Reference land pattern layout (reference IPC7351 SOIC127P600X175-8M); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances C Branding scale and appearance at supplier discretion
D Terminal #1 mark area
N = Device part number = Supplier emblem Y = Last two digits of year of manufacture W = Week of manufacture L = Lot number
Copyright (c)2010, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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